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(Full Firmware Plan)

External Triggers and Vetos (ETV)

(Firmware coder: Jon Wilson)

Structure

The External Trigger and Veto (ETV) module is independent from the main detector data path in the L1 trigger. It takes in input that originates from the SDU or the DCRC's external LEMO connector and produces a special-purpose set of trigger primitives to be written to the FIFO. This module also receives trigger-veto signals from the external connectors, which allow external information to be used to temporarily block all writes to the trigger FIFO. This is expected to be used during brief periods of high noise to keep the trigger FIFO from getting filled with noise-only triggers.

Data Inputs

The inputs are derived from the external connectors on the DCRC, which takes in signals from the signal distribution unit (SDU). The input can be one of the following three:

  • An external trigger input
  • A start veto input
  • A stop veto input

Note that the data format is not yet specified. Input is needed from Sten about the format and meaning of the SDU signals and how they can be used in the FPGA.

The input signals will be something simple, along the lines of a bit that is high on a rising clock edge, plus a couple of bits to indicate the type of input (external trigger, start veto, or stop veto). The final specification of the inputs will not be available until Sten has had a chance to get the design of the SDU at least closer to finished.

Configuration and Control Inputs
  • Trigger on LEMO rising: 1 bit
  • Trigger on LEMO falling: 1 bit
  • Veto on LEMO low: 1 bit
  • Veto on LEMO high: 1 bit
  • SDU message response: 2 bits / SDU message, 216 possible SDU messages
  • 100 MHz clock input
  • 1 reset input
  • Current timestamp: 32 bits
    (This is a counter that is incremented by the DCRC every time a phonon ADC sample is stored into memory. It is not a part of the trigger firmware, and is instead computed by the main DCRC firmware and provided to the trigger firmware as well as to other parts of the main DCRC firmware. It is set to zero at the beginning of a series, and so it records the number of phonon samples recorded since the series start. It will roll over to zero about every 2 hours, which is more than long enough to avoid any ambiguity for the MIDAS front-end. The same counter is used by the Random Trigger and Peak Search modules to provide trigger timestamps.)
Output There is one streaming output, which goes to the L1 FIFO module
  • The output is a set of trigger primitives and comprises the following information:
    • Timestamp of the trigger or veto
    • A special code used to indicate the nature and source of the external trigger or veto
    • The trigger word, which for external triggers and vetos is all zeros
    • The trigger logic bits, which for external triggers and vetos is all ones
  • The output is an Avalon-ST format stream.
  • The output stream includes the following signals:
    • 72 data bits, broken down as follows, ordered from the most-significant bits to the least-significant bits:
      • 32 bits: timestamp
      • 16 bits: trigger/veto special code
      • 16 bits: all set to 0
      • 8 bits: all set to 1
    • 1 "valid" bit
  • Each output produced by this module (or by the Random Trigger and Trigger Logic modules) produces a single entry in the FIFO.
Error bits

The module detects and reports several possible erroneous conditions via a register read. The value read out consists of 16 bits; the most-significant bits are unused.

Note: there are two error registers, one for the LEMO module and one for the SDU module.

  • LEMO module:
    • Bit 0: Read or write to invalid register address
    • Bit 1: Invalid value written to register
    • Bit 2: Output packets colliding
    • Bit 3: Configured to veto on both LEMO high and LEMO low
  • SDU module:
    • Bit 0: Invalid value written to register
    • Bit 1: Output packets colliding
    • Bit 2: Invalid configuration in SDU message response table
Functionality Brief functional description:

The ETV module takes in input received from the external trigger sources and, depending on the input, produces one of three words to send to the L1 FIFO module.

More detailed description (including data transfer information):

Step-by-step:

  1. Receive an input from the external connectors
  2. Determine whether to issue a trigger, a veto start, or a veto stop:
    • LEMO input:
      • If the LEMO input changes from low to high (rising edge), then we need to send:
        • Trigger, if configured to trigger on LEMO rising edges
        • Veto start, if configured to veto on LEMO high
        • Veto stop, if configured to veto on LEMO low
      • If the LEMO input changes from high to low (falling edge), then we need to send:
        • Trigger, if configured to trigger on LEMO falling edges
        • Veto start, if configured to veto on LEMO low
        • Veto stop, if configured to veto on LEMO high
    • SDU message: When an SDU message is received, find the configured response in the lookup table. Then, the action(s) we take depend on whether or not we are currently in the middle of an SDU-inposed veto according to the following table. The leftmost column of the table indicates the response that was retrieved from the lookup table. The top row of the table indicates the current veto state. The interior of the table indicates the actions taken by this module.
      Currently in the middle of an SDU-imposed veto NOT currently in the middle of an SDU-imposed veto
      Ignore
      (value 00)
      Send nothing Send nothing
      Trigger (value 01) Send a veto stop, then a trigger, then a veto start Send a trigger
      Start veto (value 10) Send nothing Send a veto start
      End veto (value 11) Send a veto stop Send nothing
  3. Send the output. First send any veto stop, then any trigger, then any veto start.
    • If sending a veto end, send the following 72 bits as an output
      • 32 bit timestamp: current timestamp
      • 16 bits: 2 (code indicating veto stop)
      • 16 bits: all 0
      • 8 bits: all 1
    • If sending a trigger, send the following 72 bits as an output
      • 32 bit timestamp: current timestamp
      • 16 bits: a code (3 or greater) that indicates the source of the external trigger
      • 16 bits: all 0
      • 8 bits: all 1
    • If sending a veto start, send the following 72 bits as an output
      • 32 bit timestamp: current timestamp
      • 16 bits: 1 (code indicating veto start)
      • 16 bits: all 0
      • 8 bits: all 1
  4. Return to step 1

Reset Signal:

When the reset signal is asserted,
  • Set the LEMO module to neither veto nor trigger on any LEMO inputs.
  • Set all the error bits to zero.
When the reset signal is deasserted,
  • Go back to Step 1

Testing Plan

More detail is here.