What is the Trigger Firmware (first version) and what are our goals?

This task is to implement the algorithm designed in WBS 1.6.6.1 in firmware for the FPGA on the DCRC (WBS 1.5.2). This first version is expected to target Rev D of the DCRC, the Altera Cyclone IV. This task requires the use of Altera's CAD software, and the trigger firmware must be integrated into the more general board control firmware.